Christos Savvas Bouganis

Dr. Christos Bouganis received the M.Eng degree in Computer Engineering and Informatics from University of Patras Greece in 1998, the MSc degree in Communications and Signal Processing in 1999 and the Ph.D. degree in 2004 both from Imperial College London. He joined the Department of Electrical and Electronic Engineering as academic faculty in 2007.

He is currently a Professor of Intelligent Digital Systems in the Department of Electrical and Electronic Engineering, the Director of Undergraduate Studies of the department and leads the Intelligent Digital Systems Lab (iDSL).

His research inlcudes the theory and practice of reconfigurable computing and design automation, mainly targeting digital signal processing algorithms. His work is currently focused on Machine Learning, Computer Vision and Image Processing, Markov Chain Monte Carlo Systems, and computing with unreliable hardware.

He currently serves on the program committees of many international conferences, including FCCM, FPL, FPT, DATE, SPPRA, and VLSI-SoC and is an editorial board member of ACM TRETS, IET Computers and Digital Techniques, and the Journal of Systems Architecture.

Education

• Ph.D. Imperial College London (1999 — 2004)
• MSc Imperial College London (1998 — 1999)
• Diploma University of Patras, Greece (1993 — 1998)

Awards

• "A METHOD OF IDENTIFYING A MEASURE OF FEATURE SALIENCY IN A SEQUENCE OF IMAGES", CHEUNG PETER, BOUGANIS CHRISTOS, LIU YANG, WO2008040945 (A1) ― 2008-04-10, PATENT, 2008

External Positions

• Area chair for "Design and Implementation of Signal Processing Systems", 17th European Signal Processing Conference, 2012 - 2012
• Track Chair, EEE International Conference on Field Programmable Logic and Applications, 2011 - 2012
• Proposal evaluator for Research Grants Council (RGC) of Hong Kong, 2011 - 2011
• Proposal evaluator for the Greek government, “Archimedes III”, 2011 - 2011
• Proposal evaluator for the Greek government, “Thalis”,, 2011 - 2011
• Area Chair, FIP/IEEE International Conference on Very Large Scale Integration, 2010 - 2011
• Proposal evaluator for Nanyang Technological University, Singapore, 2010 - 2010
• Proposal evaluator for the Greek government, “Heraclitus II”, 2010 - 2010
• Proposal evaluator for the Spanish government, “2010 CONSOLIDER”, 2010 - 2010
• A1 Track co-chair, The Design, Automation, and Test in Europe (DATE), 2010 - 2011
• Proposal evaluator for the Greek government, “Innovation Clusters – EPAN II, 2009 - 2009
• Proposal evaluator for the Spanish government, “2009 CONSOLIDER”, 2009 - 2009
• General Chair, International Workshop on Applied Reconfigurable Computing, 2008 - 2008
• TPC member, IEEE International Conference on Field Programmable Logic and Applications, 2007
• Program co-chair, IET FPGA Designers’ Forum 2007, 2007 - 2007
• TPC member, IEEE International Conference on Field Programmable Technology, 2006

Industrial Connections

• Barnard Microsystems Limited, Status Monitoring of Unmanned Aircraft
• DSTL, Investigate the Effectiveness of Super-resolution algorithms as applied to faces in video stream
• Neurasmus : The Erasmus Neuroscience Company, DeSyRe, European project
• Partner Electronics, Status Monitoring of Unmanned Aircraft
• Recore Systems, DeSyRe, European project
• Yogitech SpA, DeSyRe, European project

Selected Publications

Journal Articles

Liu S, Mingas G, Bouganis C, 2017, An unbiased MCMC FPGA-based accelerator in the land of custom precision arithmetic, IEEE Transactions on Computers, Vol:66, ISSN:0018-9340, Pages:745-758

Papadonikolakis M, Bouganis C, 2012, Novel Cascade FPGA Accelerator for Support Vector Machines Classification, Ieee Transactions on Neural Networks and Learning Systems, Vol:23, Pages:1042-1052

Saiprasert C, Bouganis C, Constantinides GA, 2010, An Optimized Hardware Architecture of a Multivariate Gaussian Random Number Generator, ACM Transactions on Reconfigurable Technology and Systems, Vol:4, ISSN:1936-7414

Bouganis C, Pournara I, Cheung PYK, 2010, Exploration of Heterogeneous FPGAs for Mapping Linear Projection Designs, Ieee Transactions on Very Large Scale Integration (vlsi) Systems, Vol:18

Angelopoulou M, Bouganis CS, Cheung PYK, et al., 2009, Robust Real-Time Super-Resolution on FPGA and an Application to Video Enhancement, Acm Transactions on Reconfigurable Technology and Systems (trets), Vol:2

Bouganis CS, Park SB, Constantinides GA, et al., 2009, Synthesis and Optimization of 2D Filter Designs for Heterogeneous FPGAs, ACM Transactions on Reconfigurable Technology and Systems, Vol:1, ISSN:1936-7406