Jorma Skyttä
Professor, Information Technology at Aalto University School of Business
Biography
Aalto University School of Business
Peer-reviewed scientific articles
Journal article-refereed, Original researchFast point multiplication on Koblitz curves: Parallelization method and implementations
Järvinen, Kimmo; Skyttä, Jorma2009 in MICROPROCESSORS AND MICROSYSTEMS (Elsevier)On Parallelization of High-Speed Processors for Elliptic Curve Cryptography
Järvinen, Kimmo U.; Skyttä, Jorma O.2008 in IEEE Transactions on Very Large Scale Integration (VLSI) Systems (IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC)Comparative Survey of High-Performance Cryptographic Algorithm Implementations on FPGAs
Järvinen, Kimmo; Tommiska, Matti; Skyttä, Jorma2005 in IEE Proceedings: Information Security, Special Issue on Cryptographic Algorithms and Architectures for System-on-Chip (IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC)IPv6 Over ATM Flow-Handling
Loukola, M.V.; Skyttä, J.O.1998 in COMPUTER COMMUNICATIONS (Elsevier)ISSN: 0140-3664DFSP A data flow signal processor
Hartimo, Iiro; Kronlöf, Klaus; Simula, Olli; Skyttä, Jorma1986 in IEEE TRANSACTIONS ON COMPUTERS (IEEE Computer Society)ISSN: 0018-9340Conference proceedingsHow small and still effective a CMOS-SoC could ever be?
Heusala, Hannu; Skyttä, Jorma2015 ISBN: 978-1-4673-6576-5High-speed elliptic curve cryptography accelerator for Koblitz curves
Järvinen, Kimmo U.; Skyttä, Jorma O.2008 in Annual IEEE Symposium on Field-Programmable Custom Computing Machines (IEEE)ISBN: 978-0-7695-3307-0Wearable authentication device for transparent login in nomadic applications environment
Ojala, Sampo; Keinänen, Jari; Skyttä, Jorma2008 ISBN: 978-1-4244-2627-0FPGA Design of Self-certified Signature Verification on Koblitz Curves
Järvinen, Kimmo; Forstén, Juha; Skyttä, Jorma2007 in Lecture Notes in Computer Science (Springer Berlin Heidelberg)ISBN: 978-3-540-74734-5ISSN: 0302-9743Efficient Circuitry for Computing tau-adic Non-Adjacent Form
Järvinen, Kimmo; Forsten, Juha; Skyttä, Jorma2006 A Compact MD5 and SHA-1 Co-Implementation Utilizing Algorithm Similarities
Järvinen, Kimmo; Tommiska, Matti; Skyttä, Jorma2005 ISBN: 1-932415-74-2Hardware Implementation Analysis of the MD5 Hash Algorithm
Järvinen, Kimmo; Tommiska, Matti; Skyttä, Jorma2005 FPGA-based implementation of a 59-neuron feedforward neural network with a 17.1 Gbps interlayer throughput
Hämäläinen, Antti; Tommiska, Matti; Skyttä, Jorma2004 ISBN: 1932415335FPGA-Based Implementation of a 59-Neuron Feedforward Neutral Network with a 17.1 Gbps Interlayer Throughput
Hämäläinen, Antti; Tommiska, Matti; Skyttä, Jorma2004 A VHDL Generator for Elliptic Curve Cryptography
Järvinen, Kimmo; Tommiska, Matti; Skyttä, Jorma2004 in Lecture Notes in Computer Science (Springer Berlin Heidelberg)ISBN: 978-3-540-22989-6ISSN: 0302-9743A Scalable Architecture for Elliptic Curve Point Multiplication
Järvinen, Kimmo; Tommiska, Matti; Skyttä, Jorma2004 ISBN: 0-7803-8651-5Rapid prototyping of a short range radar with a reconfigurable platform
Korpela, Esa; Forsten, Juha; Hämäläinen, Antti; Tommiska, Matti; Skyttä, Jorma; Ruoskanen, Jukka; Serkola, Arvi; Eskelinen, Pekka2004 in VTT Symposia (VTT)ISBN: 951-38-6295-XISSN: 0357-9387A Fully Pipelined Memoryless 17.8 Gbps AES-128 Encryptor
Järvinen, Kimmo; Tommiska, Matti; Skyttä, Jorma2003 Bridging the gap between future software and hardware engineering; a case study using the nios softcore processor
Kairus, Jaakko; Forsten, Juha; Tommiska, Matti; Skyttä, Jorma2003 6.78 Gigabits per Second Implementation of the IDEA Cryptographic Algorithm
Hämäläinen, Antti; Tommiska, Matti; Skyttä, Jorma2002 in Lecture Notes in Computer Science (Springer Berlin Heidelberg)ISBN: 978-3-540-44108-3ISSN: 0302-9743Dijkstra´s Shortest path Routing Algorithm in Reconfigurable Hardware
Tommiska, Matti; Skyttä, Jorma2001 Hardware-based adaptive general parameter extension in WCDMA power control
Tommiska, Matti; Tanskanen, Jarno M.A.; Skyttä, Jorma2001 in IEEE VTS Vehicular Technology Conference Proceedings (IEEE)ISBN: 0-7803-7005-8ISSN: 1090-3038Hardware Acceleration inside a Differentiated Services Access Node
Forstén, J.; Loukola, M.V.; Skyttä, J.O1999 in Lecture Notes in Computer Science (Springer Berlin Heidelberg)ISBN: 978-3-540-66595-3ISSN: 0302-9743Differentiated Services over ATM
Loukola, M.V.; Skyttä, J.O.1999 Simulation Study on the DS Forwarding Architectures
Loukola, M.V.; Skyttä, J.O.1999 Merging IP Switching to The Core of IPv6
Loukola, M.V.; Skyttä, J.O.1998 Enhanced Augmented IP Routing Protocol (EAIRP) in IPv6 Environment
Loukola, M.V.; Skyttä, J.O.1998 Hop-by-hop Options Based Flow-handling Compared to Other IP over ATM Protocols
Loukola, M.V.; Skyttä, J.O.1998 Implementation of a European Paging System Receiver Using CORDIC Algorithm
Vuori, Jarkko; Skytta, J.1996 Least Square Method in Metal Detectors
Vuori, Jarkko; Skytta, J.1995 Ranging and Data Transmission with Spread Spectrum Modulated Ultrasonic Signals
Kemppainen, H.; Vuori, J.; Skyttä, J.1994 Parallel Genetic Algorithm Implementation for Stochastic Algorithm Filter Design Tool
Mäntykoski, J.; Vuori, J.; Skyttä, J.1994 DSP Implementation of European Radio Message System (ERMES) Receiver
Vuori, J.; Skyttä, J.1994 DSP Implementation of European Paging System Testing Receiver
Vuori, J.; Skyttä, J.1994 A New Wireless Paging Network Architecture
Vuori, J.; Honkanen, J.; Skyttä, J.1994 ISBN: 90-5199-193-2Communication using spread spectrum modulation on electric power distribution circuits
Vuori, Jarkko; Skyttä, J.1992 Publications intended for professional communities
Article in professional conference proceedingsNew Possibilities Offered by IPv6
Loukola, M.V.; Skyttä, J.O.1998 in IEEE INTERNATIONAL CONFERENCE ON COMPUTER COMMUNICATIONS AND NETWORKS (IEEE)ISBN: 0-8186-9014-3ISSN: 1095-2055Published development or research reportUnidirectional Packet Radio for Wide Area Paging Network Control and Maintenance
Honkanen, J.; Vuori, J.; Skyttä, J.1994 A Spread Modulated Data Transmission Scheme for Control Applications in Hostile Communication Environments
Kemppainen, H.; Vuori, J.; Skyttä, J.1994 A VLSI Architecture for Spread Spectrum Modulated Data Transmission on Electric Power Distribution Networks
Kemppainen, Hannu; Skyttä, J.; Vuori, J.1993
Fast point multiplication on Koblitz curves: Parallelization method and implementations
On Parallelization of High-Speed Processors for Elliptic Curve Cryptography
Comparative Survey of High-Performance Cryptographic Algorithm Implementations on FPGAs
IPv6 Over ATM Flow-Handling
DFSP A data flow signal processor
How small and still effective a CMOS-SoC could ever be?
High-speed elliptic curve cryptography accelerator for Koblitz curves
Wearable authentication device for transparent login in nomadic applications environment
FPGA Design of Self-certified Signature Verification on Koblitz Curves
Efficient Circuitry for Computing tau-adic Non-Adjacent Form
A Compact MD5 and SHA-1 Co-Implementation Utilizing Algorithm Similarities
Hardware Implementation Analysis of the MD5 Hash Algorithm
FPGA-based implementation of a 59-neuron feedforward neural network with a 17.1 Gbps interlayer throughput
FPGA-Based Implementation of a 59-Neuron Feedforward Neutral Network with a 17.1 Gbps Interlayer Throughput
A VHDL Generator for Elliptic Curve Cryptography
A Scalable Architecture for Elliptic Curve Point Multiplication
Rapid prototyping of a short range radar with a reconfigurable platform
A Fully Pipelined Memoryless 17.8 Gbps AES-128 Encryptor
Bridging the gap between future software and hardware engineering; a case study using the nios softcore processor
6.78 Gigabits per Second Implementation of the IDEA Cryptographic Algorithm
Dijkstra´s Shortest path Routing Algorithm in Reconfigurable Hardware
Hardware-based adaptive general parameter extension in WCDMA power control
Hardware Acceleration inside a Differentiated Services Access Node
Differentiated Services over ATM
Simulation Study on the DS Forwarding Architectures
Merging IP Switching to The Core of IPv6
Enhanced Augmented IP Routing Protocol (EAIRP) in IPv6 Environment
Hop-by-hop Options Based Flow-handling Compared to Other IP over ATM Protocols
Implementation of a European Paging System Receiver Using CORDIC Algorithm
Least Square Method in Metal Detectors
Ranging and Data Transmission with Spread Spectrum Modulated Ultrasonic Signals
Parallel Genetic Algorithm Implementation for Stochastic Algorithm Filter Design Tool
DSP Implementation of European Radio Message System (ERMES) Receiver
DSP Implementation of European Paging System Testing Receiver
A New Wireless Paging Network Architecture
Communication using spread spectrum modulation on electric power distribution circuits
Publications intended for professional communities
Article in professional conference proceedingsNew Possibilities Offered by IPv6
Loukola, M.V.; Skyttä, J.O.1998 in IEEE INTERNATIONAL CONFERENCE ON COMPUTER COMMUNICATIONS AND NETWORKS (IEEE)ISBN: 0-8186-9014-3ISSN: 1095-2055Published development or research reportUnidirectional Packet Radio for Wide Area Paging Network Control and Maintenance
Honkanen, J.; Vuori, J.; Skyttä, J.1994 A Spread Modulated Data Transmission Scheme for Control Applications in Hostile Communication Environments
Kemppainen, H.; Vuori, J.; Skyttä, J.1994 A VLSI Architecture for Spread Spectrum Modulated Data Transmission on Electric Power Distribution Networks
Kemppainen, Hannu; Skyttä, J.; Vuori, J.1993
New Possibilities Offered by IPv6
Unidirectional Packet Radio for Wide Area Paging Network Control and Maintenance
A Spread Modulated Data Transmission Scheme for Control Applications in Hostile Communication Environments
A VLSI Architecture for Spread Spectrum Modulated Data Transmission on Electric Power Distribution Networks
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